1. Field of Invention
The present invention relates to an I/V (current/voltage) converter circuit for converting current to voltage and a D/A converter using the same.
2. Description of Related Art
In a conventional D/A converter (hereinafter referred to as DAC), a current generating circuit, including a plurality of currentcells, generates a total current corresponding to the value of a digital signal, which is to be converted to an analog signal. An I/V converter circuit, which is also part of the DAC, converts the total current to a voltage, so that an analog signal having a voltage corresponding to the value of the digital signal is generated.
In the conventional DAC, however, a MOS transistor is generally used as the current generating circuit, and thus linearity failure may occur depending on the voltage of the analog signal. Also, in order to use the analog signal output from the DAC, the voltage of the analog signal generated by the DAC must be shifted in accordance with the input/output characteristics of a subsequent-stage circuit using the analog signal.
In this circumstance, an I/V converter circuit and a DAC are disclosed in this application, similarly to Japanese Unexamined Patent Application Publication No. 2002-118468 (hereinafter referred to as Patent Document), in which linearity failure of an analog signal can be overcome, and the level of the voltage of the analog signal can be shifted in accordance with the input/output characteristics of the subsequent-stage circuit.
FIG. 4 is a circuit diagram showing the configuration of an I/V converter circuit 40, which is disclosed in the Patent Document. The I/V converter circuit 40 shown in FIG. 4 includes N-type MOS transistors (hereinafter referred to as NMOSs) 42 and 44 forming a current mirror circuit; operational amplifiers 46 and 48; a P-type MOS transistor (hereinafter referred to as PMOS) 50; and a resistor 52 of a resistance R. Also, the circuit includes a current source 54 for generating a total current Isig, which corresponds to the value of a digital signal to be converted to an analog signal Vout, and which corresponds to a current supplied from the DAC. Finally, the circuit includes a current source 56 for generating a bias current Ib.
In the I/V converter circuit 40 disclosed in the Patent Document, the operational amplifier 46 controls the NMOSs 42 and 44 in the current mirror circuit so that the voltage of a node A is equal to a bias voltage Vb. Also, the operational amplifier 48 controls the PMOS 50 so that the voltage of a node B is equal to the bias voltage Vb. Further, the resistor 52 converts a current (Isig+Ib), mirrored from the NMOS 42 to the NMOS 44, to a voltage by using the bias voltage Vb as a reference voltage.
According to the I/V converter circuit 40 of the Patent Document, the voltage of the node A, that is, the source-drain voltage of a MOS transistor of the current source 54, can be fixed to a constant voltage. Therefore, linearity failure of the analog signal Vout can be overcome. Further, by adequately changing the bias current Ib, the bias voltage Vb, and the resistance R of the resistor 52 so as to change the output level of the analog signal Vout in accordance with the input/output characteristics of the subsequent-stage circuit, the analog signal Vout can be easily transmitted to the subsequent-stage circuit.
Accordingly, the analog signal Vout, which is calculated by the following equation (1), is output from the I/V converter circuit 40 according to the Patent Document:Vout=R·(Isig+Ib)+Vb=R·Isig+R·Ib+Vb.  (1)
Herein, R-Isig is a signal component and R·Ib+Vb is a clamp component.
That is, the voltage of the analog signal Vout is clamped by R·Ib+Vb, and the clamp level can be arbitrarily set by changing the values of R, Ib, and Vb. However, the amplitude of a signal component changes when the value of R is changed. Also, as described above, by dynamically changing the value of Vb, linearity failure occurs and the performance of the D/A converter deteriorates. Therefore, the clamp level is controlled by changing the value of Ib while fixing the values of R and Vb.
However, by decreasing Ib, impedance increases and the pass band of the circuit narrows, which is inadequate for a high-speed operation. Therefore, the value of Ib must be set at a value at or beyond a predetermined value, according to a maximum frequency of the signal. On the other hand, current consumption increases when the value of Ib increases, and thus the value of Ib needs to be minimized in order to suppress current consumption. Therefore, in the conventional I/V converter circuit 40, a unit for controlling the value of Ib must be provided in order to set Ib at an adequate value.